On Static Binary Translation and Optimization for ARM based Applications. Jiunn-Yeu Chen, Wuu Yang, Tzu-Han Hung, Charlie Su, Wei Chung Hsu. 2008
ARM instructions are translated into MIPS. Some statistics of arm instructions in EEMBC benchmark is given. Nearly all optimizations described in the article are for flags and conditional operations. Experemental results are given. Most performance growth (35%) is caused by cross-block selective flag updates (each flag is updated only if it will be used). Common optimizations (dead code elimination, common sub-expression elimination, constant folding, constant propagation, copy propagation) give 5%. Since it is static translator the translation time itself is not benchmarked.
Binary Translation Using Peephole Superoptimizers. Alex Aiken, Sorav Bansal. 2008
Another static binary translator. They are using some terrific peephole rules generator (probably described in other articles http://www.cse.iitd.ernet.in/~sbansal/publications.html) which allows them to perform binary translation based only on peephole rules.
Walkabout - A Retargetable Dynamic Binary Translation Framework. Cristina Cifuentes, Brian Lewis, David Ung. 2002
Interesting part is they try to use some languages and tools to generate front-ends and back-ends. Some general optimizations (mostly at basic blocks level: code layout, chaining) are discussed.
Specification-Driven Dynamic Binary Translation. Jens Troger. 2004
A dissertation about Yirr-Ma binary translator (walkaboot extension)
Retargetable and Reconfigurable Software Dynamic Translation. K. Scott, N. Kumar, S. Velusamy, B. Childers, J. W. Davidson, and M. L. Soffa. 2003
An article about Strata binary translator. They try to evaluate performance overhead of dynamic binary translation (which includes context save/restore) when translating to the same instruction set (sparc, mips, x86).
Jello: a retargetable Just-In-Time compiler for LLVM bytecode. Chris Lattner, Misha Brukman, Brian Gaeke. 2002
An article about early days of lli utility from LLVM. Some general target-independent passes are described (register allocaton, live variable analysis) as well as some x86-related optimizations (fpu, stack).
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